New chip architecture offers hope for scaling up superconducting qubit arrays – Physics World

Scientists in the US have introduced an ingenious new quantum chip architecture that significantly reduces disturbances caused by the signals used to control superconducting quantum bit (qubit) circuits. Led by Chuan Hong Liu and Robert McDermott of the University of Wisconsin, the team showed that the new multichip module (MCM) reduces gate errors by nearly a factor of 10 compared to earlier designs that used the same control system, making it a viable competitor to standard technologies.

Of the many physical systems researchers are exploring as potential  “building blocks” for a scalable quantum computer, the superconducting qubit stands out due to its high coherence time (a measure of how long it remains in a quantum state) and fidelity (a measure of how error-free its operations are). But as powerful as superconducting quantum computing can be, unlocking its full potential will require more than 1 million physical qubits. This presents a challenge, as the superconducting qubit system demands bulky cryogenic coolers and sophisticated microwave control apparatus to operate.

One way of simplifying this control apparatus would be to control the qubits using the smallest units of magnetic field – flux quanta – instead of microwaves. Quantum gates based on this single flux quantum (SFQ) digital logic technology, as it is known, use a sequence of quantized flux pulses with an inter-pulse timing precisely calibrated to the qubit’s oscillation period. This method is energy efficient, compact and capable of high-speed operations, making it an ideal candidate for integration into multiqubit circuits.

A poisonous problem

The problem is that the SFQ circuit must be placed close to the qubits, which inevitably leads to a phenomenon called quasiparticle poisoning during pulse generation. This quasiparticle poisoning induces undesired relaxations, excitations and disruptions in the superconducting circuit, diminishing the qubit’s lifespan.

To circumvent this challenge, Liu and colleagues adopted the MCM architecture. In this setup, the SFQ driver and the qubit circuits reside on separate chips. These chips are stacked on top of each other with a 6.4 micrometre gap in between and are bonded together using interconnections known as In-bumps. The physical separation between the two chips offers several advantages. It mainly acts as a barrier, preventing quasiparticles from dissipating directly from the SFQ driver to the qubit. Additionally, it prevents another source of disturbances – phonons, which are atomic or molecular vibrations – from travelling through the material, as the In-bump bonds offer a sort of resistance to their propagation. Thanks to this resistance, these vibrations are effectively scattered and prevented from reaching the qubit chip.

Order of magnitude improvement

In initial trials of SFQ digital logic using an on-chip design, the average qubit gate error was 9.1%. Thanks to the MCM, Liu and McDermott’s team lowered this to 1.2% – nearly an order of magnitude improvement.

My Favourite Qubit: quantum simulation and computation with superconducting qubits

As a future objective, the Wisconsin researchers and their colleagues at Syracuse University, the National Institute of Standards and Technology, the University of Colorado and Lawrence Livermore National Laboratory aim to further reduce the sources of quasiparticle poisoning. By experimenting with other suitable designs and further optimizing the SFQ pulse trains, the team say it may be possible to reduce gate errors to as low as 0.1% or even 0.01%, making SFQ a promising path toward achieving scalability in superconducting qubits and unlocking the exponential computing power of fault-tolerant quantum computers.

The research is published in PRX Quantum.

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• Source: https://physicsworld.com/a/new-chip-architecture-offers-hope-for-scaling-up-superconducting-qubit-arrays/